CS2100-CP multiplier equivalent, fractional-n clock multiplier.
Clock Multiplier / Jitter Reduction
Generates a Low Jitter 6 - 75 MHz Clock from a Jittery or Intermittent 50 Hz to 30 MHz Clock Source Highly Accurate PL.
. 12 5.1 Timing Reference Clock Input .... 12 5.1.1 Internal Timing Reference Clock Divider ......... 12 5.1.2 Crystal C.
The CS2100-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2100-CP is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency .
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